dc.contributor.author | Sevgen, Selcuk | |
dc.contributor.author | Arik, Sabri | |
dc.date.accessioned | 2021-03-02T20:56:56Z | |
dc.date.available | 2021-03-02T20:56:56Z | |
dc.date.issued | 2011 | |
dc.identifier.citation | Sevgen S., Arik S., "On-chip template training system and image processing applications using iterative annealing on ACE16k chip", EXPERT SYSTEMS WITH APPLICATIONS, cilt.38, sa.10, ss.12900-12905, 2011 | |
dc.identifier.issn | 0957-4174 | |
dc.identifier.other | av_048d0706-85b9-4437-8849-5b73f71cd872 | |
dc.identifier.other | vv_1032021 | |
dc.identifier.uri | http://hdl.handle.net/20.500.12627/8984 | |
dc.identifier.uri | https://doi.org/10.1016/j.eswa.2011.04.083 | |
dc.description.abstract | Cellular neural networks proved to be a useful parallel computing system for image processing applications. Cellular neural networks (CNNs) constitute a class of recurrent and locally coupled arrays of identical cells. The connectivity among the cells is determined by a set of parameters called templates. CNN templates are the key parameters to perform a desired task. One of the challenging problems in designing templates is to find the optimal template that functions appropriately for the solution of the intended problem. In this paper, we have implemented the Iterative Annealing Optimization Method on the analog CNN chip to find an optimum template by training a randomly selected initial template. We have been able to show that the proposed system is efficient to find the suitable template for some specific image processing applications. (C) 2011 Elsevier Ltd. All rights reserved. | |
dc.language.iso | eng | |
dc.subject | Sosyal ve Beşeri Bilimler | |
dc.subject | Ekonometri | |
dc.subject | Yöneylem | |
dc.subject | Bilgi Sistemleri, Haberleşme ve Kontrol Mühendisliği | |
dc.subject | Sinyal İşleme | |
dc.subject | Bilgisayar Bilimleri | |
dc.subject | Algoritmalar | |
dc.subject | Mühendislik ve Teknoloji | |
dc.subject | Ekonomi ve İş | |
dc.subject | Sosyal Bilimler (SOC) | |
dc.subject | OPERASYON ARAŞTIRMA VE YÖNETİM BİLİMİ | |
dc.subject | Mühendislik | |
dc.subject | MÜHENDİSLİK, ELEKTRİK VE ELEKTRONİK | |
dc.subject | Mühendislik, Bilişim ve Teknoloji (ENG) | |
dc.subject | Bilgisayar Bilimi | |
dc.subject | BİLGİSAYAR BİLİMİ, YAPAY ZEKA | |
dc.title | On-chip template training system and image processing applications using iterative annealing on ACE16k chip | |
dc.type | Makale | |
dc.relation.journal | EXPERT SYSTEMS WITH APPLICATIONS | |
dc.contributor.department | İstanbul Üniversitesi , , | |
dc.identifier.volume | 38 | |
dc.identifier.issue | 10 | |
dc.identifier.startpage | 12900 | |
dc.identifier.endpage | 12905 | |
dc.contributor.firstauthorID | 57603 | |